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(parent: f878224) | patch

author	Nick Gasson <nick@nickg.me.uk>
	Sat, 1 Jan 2022 06:21:27 +0000 (14:21 +0800)
committer	Nick Gasson <nick@nickg.me.uk>
	Sun, 20 Nov 2022 20:55:02 +0000 (20:55 +0000)
commit	4e82c27c6ac477108aaa577889db2342e07a3f70
tree	396bc9f2706f5d1cfec98275465a17544ec85cf3	tree \| snapshot
parent	f8782244d357d15294e9374dcf4f7e7f4c5c317d	commit \| diff

Add object type for representing Verilog AST

24 files changed:

Makefile.am		diff \| blob \| history
src/dump.c		diff \| blob \| history
src/elab.c		diff \| blob \| history
src/lib.c		diff \| blob \| history
src/lib.h		diff \| blob \| history
src/lower.c		diff \| blob \| history
src/object.c		diff \| blob \| history
src/object.h		diff \| blob \| history
src/parse.c		diff \| blob \| history
src/prim.h		diff \| blob \| history
src/tree.c		diff \| blob \| history
src/tree.h		diff \| blob \| history
src/type.c		diff \| blob \| history
src/util.h		diff \| blob \| history
src/vlog/Makemodule.am	[new file with mode: 0644]	blob
src/vlog/vlog-dump.c	[new file with mode: 0644]	blob
src/vlog/vlog-node.c	[new file with mode: 0644]	blob
src/vlog/vlog-node.h	[new file with mode: 0644]	blob
src/vlog/vlog-phase.h	[new file with mode: 0644]	blob
test/run_regr.c		diff \| blob \| history
test/test_jit.c		diff \| blob \| history
test/test_lib.c		diff \| blob \| history
test/test_value.c		diff \| blob \| history
tools/run.sh		diff \| blob \| history

VHDL compiler and simulator