From b6617ff90460529a66b5fdfa1e2c4d1564962cae Mon Sep 17 00:00:00 2001
From: Nick Gasson <nick@nickg.me.uk>
Date: Mon, 15 Jan 2024 18:13:53 +0000
Subject: [PATCH] Missing array length check for certain collapsed ports

---
 src/lower.c           | 10 ++++++----
 test/elab/bounds7.vhd | 28 ++++++++++++++++++++++++++++
 test/test_elab.c      | 20 ++++++++++++++++++++
 3 files changed, 54 insertions(+), 4 deletions(-)
 create mode 100644 test/elab/bounds7.vhd

diff --git a/src/lower.c b/src/lower.c
index eff43fb2..6d6be159 100644
--- a/src/lower.c
+++ b/src/lower.c
@@ -11853,6 +11853,12 @@ static void lower_direct_mapped_port(lower_unit_t *lu, driver_set_t *ds,
       lower_put_vcode_obj(port, var, lu);
    }
 
+   if (type_is_array(type)) {
+      vcode_reg_t locus = lower_debug_locus(map);
+      lower_check_array_sizes(lu, port_type, type, VCODE_INVALID_REG,
+                              src_reg, locus);
+   }
+
    if (!type_is_homogeneous(type)) {
       vcode_reg_t ptr = emit_index(var, VCODE_INVALID_REG);
       if (field != -1)
@@ -11874,10 +11880,6 @@ static void lower_direct_mapped_port(lower_unit_t *lu, driver_set_t *ds,
       }
    }
    else if (field == -1 && type_is_array(type)) {
-      vcode_reg_t locus = lower_debug_locus(map);
-      lower_check_array_sizes(lu, port_type, type, VCODE_INVALID_REG,
-                              src_reg, locus);
-
       vcode_reg_t data_reg = lower_array_data(src_reg);
       emit_alias_signal(data_reg, lower_debug_locus(port));
 
diff --git a/test/elab/bounds7.vhd b/test/elab/bounds7.vhd
new file mode 100644
index 00000000..0a40f9c9
--- /dev/null
+++ b/test/elab/bounds7.vhd
@@ -0,0 +1,28 @@
+entity bounds7 is
+end entity;
+
+architecture test of bounds7 is
+    type t_rec is record
+        x, y : integer;
+    end record;
+
+    type t_rec_array is array (natural range <>) of t_rec;
+
+    function get_value return natural is
+    begin
+        return 3;
+    end function;
+
+    signal s : t_rec_array(1 to get_value);
+begin
+
+    b: block is
+        generic ( A : natural );
+        generic map ( A => 8 );
+        port ( t : t_rec_array(1 to A) );
+        port map ( s );                 -- Error
+    begin
+        assert t(A - 1) = (1, 2);
+    end block;
+
+end architecture;
diff --git a/test/test_elab.c b/test/test_elab.c
index 3feea6c7..983692a1 100644
--- a/test/test_elab.c
+++ b/test/test_elab.c
@@ -1698,6 +1698,25 @@ START_TEST(test_gentype1)
 }
 END_TEST
 
+START_TEST(test_bounds7)
+{
+   set_standard(STD_08);
+
+   input_from_file(TESTDIR "/elab/bounds7.vhd");
+
+   const error_t expect[] = {
+      { 23, "actual length 3 does not match formal length 8" },
+      { -1, NULL }
+   };
+   expect_errors(expect);
+
+   tree_t e = run_elab();
+   fail_unless(e == NULL);
+
+   check_expected_errors();
+}
+END_TEST
+
 Suite *get_elab_tests(void)
 {
    Suite *s = suite_create("elab");
@@ -1791,6 +1810,7 @@ Suite *get_elab_tests(void)
    tcase_add_test(tc, test_bounds42);
    tcase_add_loop_test(tc, test_block2, STD_02, STD_19 + 1);
    tcase_add_test(tc, test_gentype1);
+   tcase_add_test(tc, test_bounds7);
    suite_add_tcase(s, tc);
 
    return s;
-- 
2.39.2