git.nickg.me.uk Git - nvc.git/commit

]> git.nickg.me.uk Git - nvc.git/commit

projects / nvc.git / commit

summary | shortlog | log | commit | commitdiff | tree
(parent: 27047d6) | patch

author	Nick Gasson <nick@nickg.me.uk>
	Fri, 10 Mar 2023 19:18:41 +0000 (19:18 +0000)
committer	Nick Gasson <nick@nickg.me.uk>
	Fri, 10 Mar 2023 19:18:41 +0000 (19:18 +0000)
commit	1724cbfb4acb3cd46f12f6ab12fc0aee7c249ce5
tree	90b9c128386ee0cfe227cbd1c5f27fad890cb430	tree \| snapshot
parent	27047d68741a1754bfac60cdf8011b7e7e230f82	commit \| diff

Parse Verilog continuous assignment

src/lexer.l		diff \| blob \| history
src/scan.c		diff \| blob \| history
src/scan.h		diff \| blob \| history
src/vlog/vlog-dump.c		diff \| blob \| history
src/vlog/vlog-node.c		diff \| blob \| history
src/vlog/vlog-node.h		diff \| blob \| history
src/vlog/vlog-parse.y		diff \| blob \| history
src/vlog/vlog-sem.c		diff \| blob \| history
test/test_vlog.c		diff \| blob \| history
test/vlog/parse1.v	[new file with mode: 0644]	blob

VHDL compiler and simulator