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author	Nick Gasson <nick@nickg.me.uk>
	Fri, 23 Feb 2024 11:11:07 +0000 (11:11 +0000)
committer	Nick Gasson <nick@nickg.me.uk>
	Fri, 23 Feb 2024 11:11:07 +0000 (11:11 +0000)
commit	975ae50ed180236389dcdf316b1d94899c9f2d76
tree	07aca6f944e6ce97ae762f512df848655efad790	tree \| snapshot
parent	aca6f5d7eb6549d2354245c18bca061453a6f0f3	commit \| diff

Use triggers for sensitised VHDL processes

13 files changed:

src/jit/jit-core.c		diff \| blob \| history
src/jit/jit-exits.c		diff \| blob \| history
src/jit/jit-exits.h		diff \| blob \| history
src/jit/jit-irgen.c		diff \| blob \| history
src/jit/jit.h		diff \| blob \| history
src/lower.c		diff \| blob \| history
src/psl/psl-lower.c		diff \| blob \| history
src/rt/model.c		diff \| blob \| history
src/rt/structs.h		diff \| blob \| history
src/vcode.c		diff \| blob \| history
src/vcode.h		diff \| blob \| history
test/lower/trigger1.vhd	[new file with mode: 0644]	blob
test/test_lower.c		diff \| blob \| history

VHDL compiler and simulator