]> Nick Gasson's Git Repositories - nvc.git/commit
Add Verilog preprocessor step
authorNick Gasson <nick@nickg.me.uk>
Sat, 21 Oct 2023 09:34:45 +0000 (10:34 +0100)
committerNick Gasson <nick@nickg.me.uk>
Sat, 21 Oct 2023 09:34:45 +0000 (10:34 +0100)
commitca4480aa95a30faf30be626569f50de6ba0fb8ed
treea1797282715ece96832c6e6f90ab23f357138622
parent10c478f3f992ef1b2268f34f1b055acafc766b3d
Add Verilog preprocessor step
Makefile.am
src/nvc.c
src/vlog/Makemodule.am
src/vlog/vlog-phase.h
src/vlog/vlog-pp.l [new file with mode: 0644]
test/test_vlog.c
test/vlog/pp1.v [new file with mode: 0644]